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JPS6437849A Expired / Lapsed JP ⏱️ 0.0 years remaining

Formation of multilayer interconnection layer of semiconductor device

Assignee: Sharp Corp
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Filing: 1987-08-03
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Granted: —
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Expires: 2007-08-03
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Abstract

Abstract PURPOSE:To prevent the generation of leakage among wirings without increasing processes by protecting regions except a wiring region on an inter-layer insulat ing film with a photo-resist and forming a second layer and subsequent layers in multilayer interconnections through a sputtering method. CONSTITUTION:An N-P-N transistor 8 is prepared on a P-type silicon substrate 1 through a general process for a bipolar IC, a first wiring layer 10 is shaped onto an oxide film 9, and an inter-layer insulating film 11 and the photo-resist 12 of an inversion wiring pattern in regions except a second layer wiring region are laminated onto the oxide film 9 and wiring layer 10. When a second wiring layer 13 is formed through a sputtering method while protecting the regions except the wiring region, using the resist 12 as a mask, no conductive modified layer 14 is shaped to the film 11 in regions except the layer 13. Accordingly, when the layer 12 and the layer 13 on the layer 12 are removed through a lift-off method, the second layer 13 is formed without increasing etching processes, and multilayer interconnections are shaped similarly without augmenting etching processes, thus preventing the generation of leakage among wirings.

Inventors

  • 👤 Tomoyuki Hikita

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 20:03
CPC Classifications
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