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JPS6428951A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor memory device

Assignee: Sony Corp
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Filing: 1987-07-24
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Granted: —
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Expires: 2007-07-24
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Abstract

Abstract PURPOSE:To reduce a total occupied area and to realize the high density by a method wherein a switching transistor is formed on a top face of a pillar- shaped protruding part and a capacitor for information memory use is formed on the bottom side of a valley part in its circumference. CONSTITUTION:Pillar-shaped protruding parts 22 are arranged and formed on a semiconductor substrate 21 at two or more crossed parts in individual lines X and individual rows Y which are crossed at nearly right angles and which are situated at prescribed intervals. A capacitor C of MIS structure where a capacitor electrode 35 is applied to a lower sidewall of the individual pillar-shaped protruding parts 22 via an insulating film 27 is constituted; a source-drain region 29 composed of a region where an impurity has been introduced into an upper part, i.e. a top part, of the pillar-shaped protruding parts 22 is formed; a switching transistor Q of MIS transistor structure where a gate electrode 32 is applied to an upper sidewall of the pillar-shaped protruding parts 22 via a gate insulating film 30 is formed; individual memory cells M are constituted at the individual pillar-shaped protruding parts 22. After individual gate electrodes 32 have been connected mutually, respective common word lines W are extracted.

Inventors

  • 👤 Hideharu Nakajima

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 22:53
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/39; H10B12/395

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS62140456A Cited

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