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JPS6417475A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of mos semiconductor device

Assignee: Sony Corp
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Filing: 1987-07-11
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Granted: —
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Expires: 2007-07-11
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Abstract

Abstract PURPOSE:To form a lower gate electrode which is not overlapped with the source and drain between insulating regions by forming the insulating regions with an upper gate electrodes as a mask on the surface of a substrate in a double-side gate type MOSFET. CONSTITUTION:A lower gate insulating film 2, a source region 9, a drain layer 10, a channel layer 11, an upper insulating film 4 and an upper gate electrode 5 are formed on a substrate 1. Then, with the electrode 5 as a mask a semiconductor high resistance substance is doped on the substrate 1 to form an insulator region 7 on the substrate 1. A lower gate electrode 8 which is completely aligned to the electrode 5 is formed between the insulator regions. When it is constructed in this manner, the overlapping capacities of the electrode 8, the regions 9, 10 can be reduced.

Inventors

  • 👤 Hisao Hayashi

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 16:08
CPC Classifications
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