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JPS6415965A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor memory and manufacture thereof

Assignee: Toshiba Corp
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Filing: 1987-07-10
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Granted: —
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Expires: 2007-07-10
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Abstract

Abstract PURPOSE:To make it possible to form easily various kinds of well regions, and improve their performance and characteristics remarkably, by providing a semiconductor substrate with a plurality of identical conductivity type wells whose surface concentrations are different, and arranging a memory cell in a well whose surface concentration is highest. CONSTITUTION:Boron is ion-implanted in a part 102 turning to a first P-well region in the cell region A of a dynamic RAM on a P-type semiconductor substrate 101, and at the same time, and at the same time, ion is implanted also in a part 102' turning to a second P-well region in the peripheral part B. Next, phosphorus 104 is ion-implanted in the part turning to a first P-well region and the part turning to the second P-well region, by using a resist 103. In a cell region, is formed a first P-well region 107 whose surface concentration is 5X10<17>cm<-3>. In an N-channel region of peripheral circuits, is formed a second P-well region 105 whose surface concentration is 2X10<17>cm<-3>. On the second P-well and the first N-well for peripheral circuits, the following are formed to constitute a DRAM; a gate electrode 113, a gate electrode 114, diffusion layer regions 115, 116, a wiring layer 117 to lead out each electrode, and so on.

Inventors

  • 👤 Shizuo Sawada

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 00:40
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0156

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS55160463A Cited
JPS60200568A Cited
JPS60143665A Cited

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