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JPS6412631A Expired / Lapsed JP ⏱️ 0.0 years remaining

Optical receiving circuit

Assignee: NEC Corp
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Filing: 1987-07-06
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Granted: —
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Expires: 2007-07-06
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Abstract

Abstract PURPOSE:To reduce the scale of automatic adjusting device and to simplify adjustment by using a CPU having an external control terminal for initial setting and controlling the CPU externally. CONSTITUTION:An output of a photodetector 1 converting an optical signal into an electric signal is amplified by a preamplifier circuit 2, the result is given to an AGC circuit 3, the output amplitude of the AGC circuit 3 is detected by a peak detection circuit 5 and its output is converted into a digital signal by an A-D conversion circuit 6 and it is used as the input signal to a CPU 7. The 1st output processed by the CPU 7 is converted into an analog signal by the 1st D-A conversion circuit 10 to control the gain of the AGC circuit 3. The 2nd output of the CPU 7 is converted into an analog signal by the 2nd D-A converter circuit 8 and the signal becomes an applied voltage to the photodetector 1 via a high voltage generating circuit 9 to keep the output amplitude of the AGC circuit 3 constant. An identification circuit 7 uses a threshold or the like being the conversion of the 3rd output into an analog signal by the 3rd D-A conversion circuit 11 to identify and reproduce the output of the AGC circuit 3. Thus, the scale of the automatic adjusting device is reduced and the adjustment is simplified.

Inventors

  • 👤 Kiyohisa Yamada

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 05:27
CPC Classifications
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