Non volatile semiconductor memory device

Abstract

Abstract PURPOSE:To reduce the uneven step-difference on a substrate surface caused by a gate electrode, improve the quality of an insulating film and a wiring on the element region, and increase the reliability, by burying a floating gate electrode in a substrate between source and drain regions, via a gate insulating film. CONSTITUTION:As to an EPROM cell structure having a floating gate electrode, a floating gate electrode 7 is buried in a trench 5 via a gate insulating film 6. The trench is arranged in an exposed portion of a P<-> type silicon substrate surface 1 and defined by a field insulating film 2. A memory cell is constituted of a source region 8 and a drain region 9 of n<+> type which are arranged in the semiconductor surface 1 on both sides of the trench 5 and separated by the trench 5, and whose bottom parts reach the lower region of the floating gate electrode 7. As the floating gate electrode is buried in the trench 5 in this manner, the uneven step-difference on the cell surface caused by the gate electrode can be remarkably reduced.

Inventors

• 👤 Akihiko Watanabe

Bibliographic Details