Data processor

Abstract

Abstract PURPOSE:To attain the earlier start of the decoding of an instruction executed next to a branch instruction by making the address tag of a branch target instruction buffer as the address of the instruction executed immediately before the branch instruction. CONSTITUTION:When the instruction code is fetched from an instruction perfecting queue 1 into an instruction decoding part 2, an instruction code is started and the inside of a branch target instruction buffer A4 is retrieved by the address value. When the instruction during the present decoding is the instruction to disturb the flow of the instruction executed recently, the data are registered to the branch target instruction buffer A4, therefore, in retrieving, the entry is hit. In this time, since the retrieving in the branch target instruction buffer A4 is started by the address of the instruction executed immediately before the branch instruction, the retrieving is started earlier than when the retrieving is started by the address of the branch instruction. Thus, since the preparations to fetch the instruction code 10 of the hit entry into the instruction decoding part 2 can be executed earlier, the instruction code 10 of the jump destination can be fetched into the instruction decoding part 2 immediately after the decoding of the branch instruction is completed.

Inventors

• 👤 Shunichi Iwata
• 👤 俊一 岩田
• 👤 Toyohiko Yoshida
• 👤 豊彦 吉田

Bibliographic Details