Refreshing method for memory

Abstract

Abstract PURPOSE:To attain the refresh of a DRAM of 256k bits by activating a RAS signal according to a memory access signal inputted during a refresh period at every M1 cycle, activating a CAS signal before the activation and holding the state during the period of the M1 cycle. CONSTITUTION:According to the memory access signal inputted externally during the refresh period at every an instruction fetch (M1) cycle, the row address strobe (RAS) signal is activated, before the activation, the column address strobe signal (CAS) is activated, and the state is held during the period of the M1 cycle of the cycle. A RAS26, since an FF5 is reset in T3 and T4 states, is charged according to the memory access signal 23. A CAS28 continues to be '0' until the inverse of Q output of an FF2 goes to '0' at the leading of the initial clock signal 22 of a next M1 cycle and an FF3 is set. Thus, during the refreshing period of the M1 cycle, the CAS is activated before the RAS is activated, thereby, the refresh of the DRAM of 256k bits can be performed.

Inventors

• 👤 Yoshio Matsuda
• 👤 松田　欣雄

Bibliographic Details