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JPS6356754A Expired / Lapsed JP ⏱️ 0.0 years remaining

Input/output channel

Assignee: Toshiba Corp
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Filing: 1986-08-28
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Granted: —
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Expires: 2006-08-28
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Abstract

Abstract PURPOSE:To execute the high speed of a said reading by executing a memory reading request without awaiting the reply of a preceding MA when a memory reading address (MA) to be sent to a main memory device shows the same memory bank as a preceding MA. CONSTITUTION:The titled channel has a main memory device 13 to execute a memory interleave control with the data width of plural times of the data width of a system 12 as a unit. When the data transferring from a said main memory device 13 to an input/output device 14 is executed through a data buffer, the memory reading (MR) request to the same memory bank (MB) is executed continuously at plural times and reading data are returned in the sequence of the request for an MR request to the same MB. Consequently, next, it is executed by an input output channel 15 whether or not the MR address to be sent to the said main memory device 13 shows the same memory bank as the preceding MR address, and in case of the same, the next MR request is executed before the reading data from the main memory device 13 are returned and the high speed is executed.

Inventors

  • 👤 Junichi Kihara
  • 👤 淳一 木原
  • 👤 Hiroyuki Kaneko
  • 👤 金子 浩行

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 06:11
CPC Classifications
G; G11; G11C; G11C8/00; G11C8/04; G06; G06F; G06F13/00; G06F13/10; G06F13/12; G06F13/122; G06F13/14; G06F13/16; G06F13/1668; G06F13/1678

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