Semiconductor logic circuit

Abstract

Abstract PURPOSE:To shorten the cut-off time of an output transistor (TR) and to quicken the circuit operation by extracting undesired electric charge caused in a base of the output TR though a pull-down TR when the output TR is cut off. CONSTITUTION:With an input voltage at H level, the pull-up circuit 4 is turned off, the output TR T7 is turned on and its output goes to L. With the input voltage changed from H to L, the TR T7 starts being changed from ON to OFF. Thus, the output of the circuit starts rising and an electric charge is caused on the base of the TR T7 through a base-collector capacitance CCB of the TR T7 due to the mirror effect at a point of time. Since the TR T8 is turned on because a base current is supplied slightly via a resistor R10 even at that point of time, the electric charge generated in the base of the TR T7 is absorbed effectively and gives it to the GND. Thus, the distortion in the output waveform generated when the output changes from L to H is prevented, and the circuit of the next stage is driven properly at a high speed.

Inventors

• 👤 Hiroshi Enomoto
• 👤 宏 榎本
• 👤 Yasushi Yasuda
• 👤 保田　康
• 👤 Masao Kumagai
• 👤 正雄 熊谷
• 👤 Akinori Tawara
• 👤 田原　昭紀

Bibliographic Details