Semiconductor integrated circuit device and manufacture thereof

Abstract

Abstract PURPOSE:To obtain a high performance semiconductor integrated circuit device which is free from a parasitic capacitance by providing impurity diffused regions which is so, formed as not to overlap a gate electrode or a gate wiring with an insulating film between. CONSTITUTION:After gate electrode materials are applied to a thin insulating film 2 in a silicon substrate 1, the gate electrode materials are processed by plasma etching technology. At that time, by the difference between the etching rates of the respective gate electrode materials, the cross-section of the processed materials has an invent T-shape. The invent T-shape gate electrode 3 is composed of a substrate side part 3a and a surface side part 3b. Then an impurity is implanted and activated by a high temperature heat treatment to form source and drain regions. As the horizontal length of impurity diffusion is equal to the length DELTA L of a brim, the diffused layers 4 do not overlap the substrate side part 3a of the gate electrode 3. Therefore, a parasitic capacitance between the impurity diffused region and the gate electrode or a gate wiring can be eliminated.

Inventors

• 👤 Shinichi Sato
• 👤 真一 佐藤

Bibliographic Details