Semiconductor memory device

Abstract

Abstract PURPOSE:To accelerate a writing operation by forming the base region of a PNP transistor element in a cross coupling type PNPN memory cell in a shallower structure than a lateral PNP transistor and making the depthwise concentration uniform. CONSTITUTION:With a photoresist as a mask a groove 28 is formed on a region to be formed with the base of a lateral PNP transistor Q3, and a P-type diffused layer 29 is further formed along the inside of the groove 28. Then, an N-type diffused layer 26 is formed by an ion implanting method only in the bottom of the groove 28, and the interior of the groove is buried with a silicon oxide film 27 or a polycrystalline silicon. Thus, the base of the transistor Q3 made of the layer 26 is formed along the wall of the groove. Further, P-type layers 14, 4 which become the emitter of the transistor Q3 and the base of an NPN transistor Q1 are selectively formed by an ion implanting method, and the N-type layers of two emitter diffused layers 13, 11 of read/write/hold are then respectively formed.

Inventors

• 👤 Susumu Oi
• 👤 進 大井

Bibliographic Details