Manufacture of semiconductor device

Abstract

Abstract PURPOSE:To accelerate the manufacturing speed of a device easily by reducing the capacity between a gate electrode of a component electric element and source.drain diffused layers by a method wherein the width of gate electrode is reduced so that the edge parts of source.drain diffused layers diffused by high temperature heat treatment may not be substantially overlapped with the lower edge parts of gate electrode. CONSTITUTION: The width of gate electrode 4 is previously reduced by two time plasma etching process using CF4/O2 mixed gas. The reduced amount at this time shall correspond to the amount of diffusion length in the specified lateral direction of diffused layer 5 of source.drain regions 7 resultant from high temperature heat treatment diffusing below the gate electrode 4 not to be substantially overlapped with (exceeding 0.1mum) the gate electrode 4. Next, a photoresist 6 is removed by plasma etching process using O2 later to be heat treated for 30 minutes in N2 atmosphere at 950 deg.C. Resultantly the edge parts of gate electrode 4 are not substantially overlapped with the edge parts of the source.drain diffused layers 5 taking the shape to be located on almost the same positions.

Inventors

• 👤 Koji Sudo
• 👤 須藤　弘司
• 👤 Hirokazu Miyoshi
• 👤 三好　寛和

Bibliographic Details