Semiconductor storage device

Abstract

Abstract PURPOSE:To effectively operate without enlarging the potential generating circuit of a dummy cell by reading storing information from a memory cell and rewriting a bit line potential in a non-selective dummy cell. CONSTITUTION:When the memory cell MC1 is selected, a reference voltage is read on a bit line inversion BL from the dummy cell DC2 and the potential of bit line pair BL, the inverse of BL is sensed and amplified by a sense amplifier. Then, at the time of entering the precharging operation of the dummy cell, the precharging is executed to the non-selective dummy cell DC1 at the potential corresponding to the storing information of the memory cell MC1. Then, MOS transistors Tr5, Tr6 are turned on, a charge stored on the dummy cells DC1, DC2 is distributed and dummy cell capacitors C3, C4 are set to an intermediate potential. Thereby, the dummy cell potential generating circuit effectively operates without requiring a large driving current.

Inventors

• 👤 Hiroshige Nagahama
• 👤 長濱　洋成
• 👤 Toru Furuyama
• 👤 古山　透
• 👤 Takashi Osawa
• 👤 隆 大澤

Bibliographic Details