Semiconductor device

Abstract

Abstract PURPOSE:To increase working speed, and to improve the degree of integration by forming a bit line and a third layer interconnection material as an emitter electrode for a bipolar transistor by a polysilicon film or the multilayer film of the polysilicon film and a metal or an silicide film thereof. CONSTITUTION:A third layer interconnection in a DRAM having Bi-MOS structure is composed of impurity-doped polysilicon, the interconnection is used as an emitter electrode for a bipolar transistor, and bit line contacts 361, 371 and emitter contacts 362, 372 (direct contacts) are shaped simultaneously. That is, a third interconnection material 36 is formed by a polysilicon film or the multilayer film of the polysilicon film and a metal or an silicide film thereof. Consequently, the bipolar transistor is formed in polysilicon emitter electrode structure, and an emitter grounding amplification factor hfe is made higher than a contact is taken with an emitter diffusion layer 30 by Al. A mask alignment margin for bringing the emitter diffusion layer 30 and the interconnection material into contact is unnecessitated. Accordingly, the area of the emitter diffusion layer 30 can be reduced, thus improving the degree of integration.

Inventors

• 👤 Seiichi Aritome
• 👤 誠一 有留

Bibliographic Details