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JPS63155495A Expired / Lapsed JP ⏱️ 0.0 years remaining

Pseudo static memory device

Assignee: Fujitsu Ltd
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Filing: 1986-12-19
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Granted: —
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Expires: 2006-12-19
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Abstract

Abstract PURPOSE:To access a word line which has been selected once and has been reset without resetting address information, by generating a usual access signal by allowing it to respond to not only an external address signal but also a level variation of a write-enable signal from the outside or a refreshing signal. CONSTITUTION:An address transition detecting circuit 3 is constituted so as to respond to a level variation of a write-enable signal WE or a refreshing chip-enable signal CEF, and to generate a chip enable signal CEN. In case an arbitrary word line is selected once, and reset, and thereafter, the word line is selected again, a usual access chip-enable signal CEN is generated by inputting the write-enable signal WE or the refreshing chip-enable signal CEF to the address transition detecting circuit 3. In such a way, it becomes unnecessary to reset especially address information of the word line from the outside, and to access the word line based thereon.

Inventors

  • 👤 Yoshihiro Takemae
  • 👤 義博 竹前

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 09:23
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/406; G11C11/40615

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