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JPS63124162A Expired / Lapsed JP ⏱️ 0.0 years remaining

Mutual coupling method for parallel computers

Assignee: Hitachi Ltd
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Filing: 1986-11-14
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Granted: —
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Expires: 2006-11-14
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Abstract

Abstract PURPOSE:To realize the mutual connection between parallel computers together with a reduced hardware scale in order to increase the communication speed and also to improve the grid-type calculation efficiency, by making a communication unit in each element processor from a communication packet to perform the transfer processing. CONSTITUTION:In a system having a gathering of a row cross bus switch 1, a column cross bus switch 2 and an element processor 3, the processor 3 contains a processing unit 31, a memory 32, a communication unit 33, etc. When both switches 1 and 2 are used for communication, the unit 33 of each processor 3 from a communication packet. This packet can be sent to an optional processor 3 when the transmitting direction, etc., are decided by the unit 33. Furthermore a route resetting bit is put into the packet and this bit is set at 1 based on dufgement of the unit 33 to be sent again to another switch if a fault occurs. Thus it is possible to secure connection between optional processors of comparatively small hardware scale. Then the communication speed is increased and at the same time the grip-type calculation efficiency is improved.

Inventors

  • 👤 Akira Muramatsu
  • 👤 晃 村松
  • 👤 Shinichiro Miyaoka
  • 👤 宮岡 伸一郎
  • 👤 Seiju Funabashi
  • 👤 舩橋 誠寿
  • 👤 Kazuo Nakao
  • 👤 中尾 和夫

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-28 05:23
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/16; G06F15/163; G06F15/173; G06F15/17356; G06F15/17368

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