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Manufacturing method of thin film transistor

Assignee: Hitachi Ltd
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Filing: 1986-10-22
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Granted: —
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Expires: 2006-10-22
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Abstract

Abstract PURPOSE:To manufacture an a-Si (amorphous silicon) TET (thin film transistor) in high performance and reliability in less threshold value (Vt) outputting sufficient ON current by a method wherein the mean substrate temperature during formation of a gate insulating film is set up to exceed the same during formation of semiconductor films. CONSTITUTION:A chrome electrode 2 is formed on an insulating substrate 1 while an SiN gate insulating film 5 is successively deposited thereon and then the first semiconductor film 7 is formed with the substrate temperature kept at 420 deg.C. Next, the substrate temperature is cooled down to 320 deg.C to form the second semiconductor film 6 and then an n<+> conductivity type semiconductor film 4. In these procedures, the gate insulating films 5, the first semiconductor film 7 and the second semiconductor film 6 are formed respectively at 420 deg.C, 420 deg.C and 320 deg.C however, if only the mean forming temperature of gate insulating film is equivalent to that of semiconductor films or exceeds the same, the temperature requirements shall be met. Through these procedures, an excellent interface in low density of charge arrested state can be established so that the charge on an interface part of a semiconductor side may be shifted easily in less Vt drift, resultantly raising the ON current.

Inventors

  • 👤 Yoshiyuki Kaneko
  • 👤 好之 金子
  • 👤 Haruo Matsumaru
  • 👤 松丸 治男
  • 👤 Ken Tsutsui
  • 👤 謙 筒井
  • 👤 Yasuo Tanaka
  • 👤 靖夫 田中
  • 👤 Akira Sasano
  • 👤 笹野 晃
  • 👤 Toshihisa Tsukada
  • 👤 俊久 塚田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 05:56
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67

Claims Analysis

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References Cited (Backward Citations)

JPS58148458A Cited

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