Semiconductor enclosure for resin sealing
Abstract
Abstract PURPOSE:To nullify the adverse effect due to a stress which occurs along with the thermal deformation of the titled enclosure as well as to increase a freedom of selection of the resins to be applied by a method wherein a vacant space is provided in the vicinity of a semiconductor element which is mounted on the lead frame and also in the vicinities of the fine metal wires to connect the element and the lead frame. CONSTITUTION:A DIP type lead frame 21 is pinched between a top force 24 and a bottom force 25 and after the lead frame is clamped, a preheated thermosetting resin 23 for sealing is charged in a pot 26. Then, the sealing resin 23 heated by the top and bottom forces 24 and 25 is pressed by a plunger 27 and the fused resin 23 is made to pass through a runner 28 and a gate 29 to enter a cavity 30. After an elapse of the curing time, the metal mold is detached to obtain a molded object fitted to the form of the cavity 30. As a result, the sealing resin 23 is formed over the whole surface below the lead frame, the sealing resin 23 opposing to that is formed into an annular resin 1 with a space at its central part and a bed part 3 of the lead frame 21 is exposed to this space part 2. Then, a semiconductor element 20 is mounted and fixed on the bed part 3.
Inventors
- 👤 Kunio Aoki
- 👤 邦男 青木
Bibliographic Details
Claims Analysis
Total Claims: 0References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.