Emulation control system

Abstract

Abstract PURPOSE:To couple already provided programs consisting of various instruction sets by selecting a desired address space in accordance with the attribute of the address space of a processor to execute instructions. CONSTITUTION:An instruction is executed in a microprocessor MPU 100 by the two-stage pipeline processing consisting of instruction prefetch of a bus interface unit 110 and instruction decoding and execution of an executing unit 150. In the unit 110, the attribute of the physical address of the instruction to be prefetched is checked and is transmitted to the unit 150 as a processor mode signal 153 together with the prefetched instruction. In this case, an address space 605 between addresses 603 and 604 has the attribute of an emulation mode EM and the other address spaces have the attribute of a native mode NM. If a segment register 114 is so determined that a program is executed in an address space 602 in case of the mode EM, the MPU 100 transfer the control to addresses having attributes of modes different from each other during execution of the mode NM as well as the mode EM.

Inventors

• 👤 Junichi Iwasaki
• 👤 岩先　純一
• 👤 Takashi Nakayama
• 👤 貴司 中山

Bibliographic Details