Processing system for sequence arithmetic

Abstract

Abstract PURPOSE:To perform arithmetic processing at a high speed by constituting a circuit so that bit data processing is put in operation only in the fetch cycle of a CPU. CONSTITUTION:A signal is outputted to a Bit-ALU 22 and a pseudo instruction conversion circuit 1 through a control signal line 7. The Bit-ALU 22 on receiving it performs the bit data processing of data held in a RAM 24 with an instruction outputted from a ROM 23. Simultaneously, the pseudo instruction conversion circuit 1 converts the instruction outputted by the ROM 23 into a nonexecution instruction of the CPU and outputs it to the CPU 21. Then, the Bit-ALU 22 completes the bit data processing while the CPU 21 is only in the instruction fetch cycle.

Inventors

• 👤 Fumio Iwai
• 👤 岩井　文雄

Bibliographic Details