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JPS6231176A Expired / Lapsed JP ⏱️ 0.0 years remaining

Laminated semiconductor device

Assignee: Sharp Corp
•
Filing: 1985-08-02
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Granted: —
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Expires: 2005-08-02
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Abstract

Abstract PURPOSE:To realize high integrity of a device by providing an MOS-type active element of a vertical structure in a recrystallization layer. CONSTITUTION:A polycrystalline silicon layer, which is to be the second active layer, is deposited on a through hole 8 with a relatively large thickness and recrystallized. As P<+> or As<+> ions in the polycrystalline silicon in the through hole 8 are diffused into the substrate, ohmic contact between the polycrystalline silicon in the through hole 8 and the recrystallization layer 4 is ensured. After the element isolation by substrate checking or the like, a gate oxide film 9 is formed. After gate polycrystalline silicon for forming a gate electrode 6 is applied and patterned, double-ion implantation of B<+> and P<+> (or As) is performed to form a P-type layer 31 and an N<+> type layer 32. In this structure, a current flows vertically as shown by an arrow. It is to be noted that, in this structure, bidirectional characteristics is ensured and the gate can be used as a transfer gate without any problem.

Inventors

  • 👤 Takahiko Oma
  • 👤 隆彦 大麻
  • 👤 Isao Nakamura
  • 👤 功 中村

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 14:25
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/66; H10D30/667; H10D30/67; H10D30/6728

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS52106688A Cited
JPS5617071A Cited
JPS5893270A Cited
JPS6012769A Cited
JPS60124974A Cited

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