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JPS6230342A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: NEC Corp
•
Filing: 1985-07-31
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Granted: —
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Expires: 2005-07-31
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Abstract

Abstract PURPOSE:To microminiaturize a pattern by forming a plurality of bumps on the periphery and the interior of a chip, obtaining a distance between bumps capable of connecting with a conductor pattern on a thin insulating plate and forming on a thin polyimide plate a pattern except the bump connector and external connector. CONSTITUTION:A semiconductor chip 1 has a plurality of bumps, which are formed of bumps 2a existing on the periphery and bumps 2b existing in the interior. A bump connector hole 4 and an external connector hole 5 of a thin plate 3 of polyimide (insulator) are punched in advance, a copper foil is contacted closely on the plate 3, and the prescribed pattern 6 is then formed. In other words, an insulating circuit board having the gold-plated pattern exposed in the holes 4, 5 on the plate 3 is formed. The pattern projected to the hole of the thin plate and a plurality of bumps 2a, 2b on the chip are positioned at 1:1 and connected.

Inventors

  • 👤 Yoshimasa Hiki
  • 👤 比企 能正

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 12:04
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/453; H10W90/00; H10W90/701; H10W90/721; H10W90/724

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5512791A Cited

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