Patent JPS62248043A successfully refreshed from Google Patents.
← Back to Patent Explorer
JPS62248043A Expired / Lapsed JP ⏱️ 0.0 years remaining

Memory switching circuit for fetching microcomputer instruction

Assignee: NEC Corp
•
Filing: 1986-04-22
•
Granted: —
•
Expires: 2006-04-22
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To select a state before which address is fetched as to its instruction, by storing the information for switching a memory by an address or the next address, in a register. CONSTITUTION:When an address from a microcomputer 1 coincides with a prescribed address, an address decoder supplies a coincidence signal to an address coincidence signal control part 17. The control part 17 is made active by an FF 14 which responds to the L output of a register 12 for storing the memory switching information, and outputs directly a coincidence output from a decoder 9. Subsequently, a memory switching part 4 separates a bus 5 from a bus 3, connects an instruction fetching memory 2 to the bus 3, and when the output of the register 12 is H, an active signal is outputted at the time of the next clock. When the decoder 9 is reset and the coincidence signal is not generated, the memory 6 for an instruction is selected. According to them, a state before which address is fetched as to its instruction can be selected, and an effective program debug is executed.

Inventors

  • 👤 Kazuyoshi Kuwabara
  • 👤 桑原 一悦

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 16:07
CPC Classifications
—

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag