Integrated circuit

Abstract

Abstract PURPOSE:To increase wiring density, and to reduce resistance loss by forming a wiring layer on a boundary section between a dielectric layer for isolation and a single crystal semiconductor layer wrapped by the dielectric layer. CONSTITUTION:A wiring layer 12 is formed on a boundary section between a dielectric layer 2 for isolation and a single crystal semiconductor layer 3 wrapped with the layer 2 in an integrated circuit composed of a plurality of the single crystal semiconductor regions 3, the dielectric layer 2 wrapping and isolating these semiconductor regions 3 and a polycrystalline semiconductor mother body 1 integrally bonding and supporting these retion 3 and layer 2. A p-type region 8 and an n-type region 9 are diffused into the semiconductor region 3 such as an n-type single crystal region 3 insularly isolated by the dielectric layer 2 such as silicon dioxide 2 on the mother body 1 such as polycrystalline silicon substrate 1, silicon dioxide 7 is formed on the surface as a gate oxide film and a wiring insulating film, a wiring 6 is shaped by a metal such as Al, and a gate 10 and a source 11 are formed. The wiring layer such as a metallic layer 12 is shaped on the boundary section between the single crystal region 3 and the silicon dioxide 2 for isolation, and the layer 12 is connected to a metallic layer 14 shaped to the surface of the substrate and used as a drain 15.

Inventors

• 👤 Kenji Ogawa
• 👤 小川　憲治

Bibliographic Details