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JPS62178084A Expired / Lapsed JP ⏱️ 0.0 years remaining

Receiver teletext

Assignee: Panasonic Holdings Corp
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Filing: 1986-01-31
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Granted: —
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Expires: 2006-01-31
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Abstract

Abstract PURPOSE:To initialize a display memory without writing initial value data on the display memory by a microcomputer, by providing a means which initializes the memory. CONSTITUTION:Chip-enable signals CE1 and CE2 are generated by frequency division outputs XA0 and XA2 of a display clock, and an output-enable signal OE is generated also, and a write-enable signal WE is in level 1 as it is. When an output REC of an initialization control register 8 is '1', the initializing operation is performed, and the signal WE is outputted in the display period, and the signal OE is '1' as it is. Addresses re given to display memories 4 and 5 by an address A' from a display address generating circuit 2, and a data switching circuit 6 switches and connects the output of an initial value data register group 7 to data busses VD0 and VD1 by frequency division outputs XA1 and XA2 to initialize all display areas of memories 4 and 5.

Inventors

  • 👤 Hiroyasu Shinpo
  • 👤 新保 博康
  • 👤 Yuichi Shiotani
  • 👤 塩谷 友一
  • 👤 Kazumi Kawashima
  • 👤 河島 和美

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 13:52
CPC Classifications
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References Cited (Backward Citations)

JPS60217775A Cited

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