N-channel field effect transistor

Abstract

Abstract PURPOSE:To obtain a threshold voltage in a desired range other tan zero and to avoid restriction on the applicable range, by providing the fourth semiconductor layer, which has sufficiently high p type impurity concentration in comparison with the first semiconductor layer, between a semi-insulating substrate and the first semiconductor layer. CONSTITUTION:Between a semi-insulating substrate 10 and a first semiconductor layer 11, a fourth semiconductor layer 14, which has sufficiently high impurity concentration in comparison with the first semiconductor layer 11, is provided. A second semiconductor layer 12 is provided. An electrode supplying layer is formed on the side of the second semiconductor layer 12 in a region between first and second semiconductor regions 15 and 16 in the first semiconductor layer 11. A first electrode 31 as a source electrode and a third electrode 33 as a gate electrode are formed so as to form said electron supplying layer. A control voltage is applied across the electrodes 31 and 33. The voltage is a threshold voltage VT, at which a transistor becomes the ON state from the OFF state. The voltatge VT is obtained in the desired range based on the difference between the ratio of a width Eg 1 of a forbidden band of the semiconductor layer 11 to the thickness of the semiconductor layers 11 and 12 and the electronic affinity of the semiconductor layers 11 and 13. Thus, the applicable range of the transistor is expanded.

Inventors

• 👤 Kunihiro Arai
• 👤 邦博 荒井
• 👤 Takashi Mizutani
• 👤 孝 水谷
• 👤 Fumihiko Yanagawa
• 👤 柳川　文彦

Bibliographic Details