Dynamic analog simulator

Abstract

Abstract PURPOSE:To facilitate easy operations of both the dynamic and long-run action tests by combining an analog simulator and a sequencer to secure the synchronization between multi-channel analog signals and attaining an variable output. CONSTITUTION:A reference clock generation processing program part 21 uses a counter, etc. to produce a reference clock. A counter processing program part 22 secures the synchronization with the reference clock and sets the generating timing and time of BCD codes every time the reference clock is produced by a pulse. An output processing program part 23 delivers the BCD code for control of a programmable power supply control part. A counter reset processing program part 24 resets the processings of all counters when the final pulse is supplied to restart the counting actions. Thus the BCD code signals are delivered in a loop. This attains a long-run action.

Inventors

• 👤 Takashi Kanazawa
• 👤 金沢　孝
• 👤 Shozo Kato
• 👤 加藤　省三

Bibliographic Details