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JPS6166300A Expired / Lapsed JP ⏱️ 0.0 years remaining

Sampling and holding circuit

Assignee: NEC Corp
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Filing: 1984-09-10
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Granted: —
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Expires: 2004-09-10
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Abstract

Abstract PURPOSE:To perform the level shift and level conversion independently of each other with no addition of a gain control circuit, etc., by combining three switches and two capacitors. CONSTITUTION:The 1st sampling circuit consists of the 1st switch 1 connected to an input terminal 11 and a capacitor 4 connected to the switch 1. Then the 2nd switch 2 is connected to the 1st sampling circuit. The 3rd switch 3 is provided between earths and in parallel to a capacitor 5 connected to the switch 2, a voltage dividing circuit consisting of the switch 2 and the capacitor 5 respectively. The voltage dividing ratio can be set according to the selection of a capacity ratio between capacitors 4 and 5. At the same time, the level of a terminal 13 is varied by operations of switches 1-3. Thus it is possible to obtain a sampling/holding circuit that can perform the level shift and level conversion operations independently of each other with no addition of a gain control circuit, etc.

Inventors

  • 👤 Machirou Kasai
  • 👤 河西 萬智朗

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 13:02
CPC Classifications
—

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