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JPS6149472A Expired / Lapsed JP ⏱️ 0.0 years remaining

Charge transfer device

Assignee: Panasonic Holdings Corp
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Filing: 1984-08-17
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Granted: —
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Expires: 2004-08-17
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Abstract

Abstract PURPOSE:To increase a transfer rate by forming three or more of reverse conduction type regions having mutually different concentration per one bit onto a substrate. CONSTITUTION:N well regions 12-14 are shaped to a P type substrate 11. The regions 12 are maximized and the regions 14 are minimized in concentration. 15, 16 represent storage gates and 17 barrier gates. An electrode P1 applying phi1 pulses and an electrode P2 applying phi2 pulses each have three gate structure, and there are differences among the potential of several electrode P1, P2 by differences among the concentration of the regions 12-14 under respective gate even when pulses phi1, phi2 are at a low level as time t1. Pulses phi1 are at a high level on the timing of time t2, and transfer charges 19 are stored under the gates 15, 16. Since pulses phi1 are at the low level and pulses phi2 at the high level at t3, charges 19 are transferred under the gates 15, 16. In the constitution, gate length is shortened even when pitches are the same. Since a transfer rate is inversely proportional to the square of gate length, the transfer rate is increased by twice or more according to the constitution.

Inventors

  • 👤 Tadashi Aoki
  • 👤 正 青木
  • 👤 Hirokuni Nakatani
  • 👤 中谷 博邦
  • 👤 Motohiro Kojima
  • 👤 基弘 小島
  • 👤 Hiroyuki Mizuno
  • 👤 博之 水野

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 10:38
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/15; H10D; H10D44/00; H10D44/40; H10D44/45; H10D44/452; H10D44/462; H10D44/464

Claims Analysis

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References Cited (Backward Citations)

JPS575361A Cited
JPS59115556A Cited

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