Multi-processor control system

Abstract

Abstract PURPOSE:To secure the sequence property of replies to requests by executing a memory access request of its own side when the processing is through with a memory access request which is executed by a memory access controller of the remote side or when the end of said processing is anticipated. CONSTITUTION:An SIU access request of the other side and an SIU access request of the own side are given successively to an SIU310 of the own side from a CPU301a and then supplied to a request buffer 303b in the order of their productions. The requests delivered from the buffer 303b are selected by a request selecting circuit 304. Then an access discriminating circuit 305 discriminates its own accesses from those of the other side. A request executing circuit 208 executes the memory access requests of own side when the processing is through with a memory request which is executed by a memory access controller of the remote side or when the end of said processing is anticipated.

Inventors

• 👤 Masao Hasegawa
• 👤 正雄 長谷川

Bibliographic Details