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Patent JPS6139728A successfully refreshed from Google Patents.
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JPS6139728A Expired / Lapsed JP ⏱️ 0.0 years remaining

Digital-analog converter

Assignee: Sony Corp
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Filing: 1984-07-31
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Granted: —
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Expires: 2004-07-31
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Abstract

Abstract PURPOSE:To obtain a D/A converting characteristic with excellent linearity by converting an input data into plural PWM waves horizontally symmetrical within one converting period and scattering a signal energy depending on a low-order bit data. CONSTITUTION:An input data DIN is split into high-order and low-order bit data and fed to a PWM control section 100. The control section 100 forms a summing synthesis waveform corresponding to a data DIN based on a count output of a counter 16. An FF27 acts like an FF with set priority when D1, D2 are logical 1 and acts like an FF with reset priority when logical 0, and applies a control signal SSW corresponding to the summing synthesis waveform to a PWM wave output section 200. A switch 71 of the output section 200 is controlled by the control signal SSW to output a converted output PWMOUT corresponding to the DIN as the summing synthesis wave with each unit pulse. Since the signal energy is scattered horizontally around the timing being the center of one converting period in the said output, the nonlinearity of the converting characteristic is reduced.

Inventors

  • 👤 Hitoshi Takeda
  • 👤 竹田 仁
  • 👤 Masayuki Katakura
  • 👤 雅幸 片倉
  • 👤 Norio Shoji
  • 👤 法男 小路

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 12:41
CPC Classifications
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