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JPS6139611A Expired / Lapsed JP ⏱️ 0.0 years remaining

Automatic level control circuit

Assignee: Toshiba Corp
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Filing: 1984-07-30
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Granted: —
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Expires: 2004-07-30
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Abstract

Abstract PURPOSE:To obtain an automatic level adjusting (ALC) circuit that does not cause over inputting even when the operation point of an amplifier is set to saturation output by adjusting the quantity of attenuation of an attenuator by output of a GaAs FET and gate current of this FET. CONSTITUTION:Output of the GaAs FET3 is detected through an output detecting circuit 7 and amplified 12, and at the same time, gate current of the FET3 is detected and amplified 11 by resistance 14 of a gate voltage circuit that supplies the current from a gate voltage supply terminal 4 to the gate through a resistance 14 and a choke coil 6a. Then, the two detected amplified outputs are added by an adder 13, and the quantity of attenuation of an input attenuator 8 is controlled by difference voltage 9 of output of the adder 13 and reference voltage 10. Thus, the quantity of attenuation can be adjusted properly, and input signal can be controlled even in the case where operation point of the GaAs FET amplifier is set to saturation area, and excessive input does not occur.

Inventors

  • 👤 Takeshi Sawada
  • 👤 武 沢田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 07:43
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3036

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Total Claims: 0
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