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JPS61216518A Expired / Lapsed JP ⏱️ 0.0 years remaining

Tri-state circuit

Assignee: NEC Corp
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Filing: 1985-03-22
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Granted: —
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Expires: 2005-03-22
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Abstract

Abstract PURPOSE:To decrease the number of constituent transistor (TR) by connecting respective drains of input insulation type field effect transistors (MISFET) to respective gates of output-stage MISFETs. CONSTITUTION:When a control signal CT is at 'H', a node N2 is held at the level 'H' through an MISFET 3 and a node N1 is held at an MISFET 2. At this time, MISFETs 1 and 4 are off, so there is no continuity between the nodes N1 and N2. An N channel MISFET 7 which has its gate input at the 'L'-level node N1 is therefore off and a P channel MISFET 8 which has its gate input at the 'H'-level node N2 is also off, so that an output OUT is in a high impedance state. In such a case, the levels at the nodes N1 and N2 are determined regardless of the state of an input signal I1 and the output has high impedance.

Inventors

  • 👤 Toshiaki Hoshi
  • 👤 俊明 星

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 08:17
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/09425; H03K19/09429

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS58209225A Cited

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