Semiconductor memory

Abstract

Abstract PURPOSE:To obtain a semiconductor memory high speed in wide range of power source voltage by constituting a circuit to prevnt voltage drop from a preword line to a main word line and enabling to output an output of large swing level to the split word line of a memory cell. CONSTITUTION:The third MOS transistor Tr 3 of P channel is provided between the preword line 1 and main word line 2, and a positive polarity signal of a split word control signal is inputted to the gate of the transistor Tr 3. When an address is selected, the preword line 1 becomes ''H'' level. When the split word control signal 3 is ''L'' level, a transistor Tr 1 becomes ''on'' and Tr 3 becomes ''on''. Accordingly, level of the preword line 1 is transferred to the main word line 2 and memory cell is selected. As the transistor Tr 3 is a MOS transistor of P channel type, back gate effect does not work, and the level of the preword line 1 itself is outputted to the main word line 2. That is, when the preword line 1 is Vcc level, the main word line 2 also becomes Vcc level.

Inventors

• 👤 Hiroshi Shimizu
• 👤 博史 清水

Bibliographic Details