Semiconductor memory

Abstract

Abstract PURPOSE:To reduce power consumption and to speed up operation, by providing a word decoder output branching means which divides memory cell parts into plural blocks in a word line direction and activates only the word line of a block including a memory cell to be selected. CONSTITUTION:A memory circuit has a word line decoder circuit DEC and memory cell parts MC1-MC4 consisting of four blocks. A signal lines from the left-hand side of the circuit DEC is wired up to the split part of the memory blocks MC1 and MC2 and branched into two word lines corresponding to those blocks. Consequently, the number of memory cells connected to a word line to be activated is decreased to reduce the power consumption, and the rising of word lines is speeded up to realize high-speed operation.

Inventors

• 👤 Kazumori Tanimoto
• 👤 谷本　和主

Bibliographic Details