Word decoder circuit

Abstract

Abstract PURPOSE:To halve the number of memories connected to the word line and to save the power consumption, by providing a common control decoder to the decoder group selecting the word line so that a pair of word line drive sections can alternately be operated. CONSTITUTION:Between memory cell groups divided into two of static type RAM, a word decoder WD is located so that the word line selection gate NOR receives the signals A1-An-1 selecting the word lines WL1, WL2 in the memory group of the row address inputs A1-An. Further, the word line drive section consisting of transistors Q31, Q33, Q1, Q35 and transistors Q32, Q34, Q2, Q36 is provided at both sides of the decoder WD, which is connected respectively to the word lines WL1, WL2. Further, to the common control decoder CD, the most significant bit An selecting either of left or right of the memory cell groups is input to select one of the word line drive sections of the decoder WD. Thus, the number of memories in connection with the word line is halved to reduce the power consumption.

Inventors

• 👤 Hiroshi Shimada

Bibliographic Details