Superconducting transistor integrated circuit

Abstract

Abstract PURPOSE:To increase a switching rate, and to improve the degree of integration of the titled circuit by positioning a substrate and a pair of superconducting electrodes on the same plane, forming a semiconductor layer extended continued to the superconducting electrodes and providing the upper section of the semiconductor layer with a control means. CONSTITUTION:B is introduced selectively to an Si substrate 7, diffusion layers 10 are formed partially and an Nb thin-film is shaped on the surface of the substrate 7, and first and second superconducting electrodes 2, 3 (source-drain electrodes) are each acquired through processing by ion etching by CF4 and a gas. Si is evaporated by using an epitaxial technique to form a polycrystalline Si layer 6, and channel layers 1 are obtained through etching from the lower section of the Si substrate 7. The lower sections of the channel layers 1 are thermal oxidized to shape insulator layers 5, and Al is applied as control electrodes 4. Accordingly, a plurality of superconducting transistors can be arranged and acquired simultaneously in a plane manner, thus easily constituting the titled circuit by superconducting wirings.

Inventors

• 👤 Mutsuko Miyake
• 👤 三宅　睦子
• 👤 Juichi Nishino
• 👤 西野　壽一
• 👤 Yutaka Harada
• 👤 豊 原田
• 👤 Masaaki Aoki
• 👤 正明 青木
• 👤 Ushio Kawabe
• 👤 川辺　潮

Bibliographic Details