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JPS6119136A Expired / Lapsed JP ⏱️ 0.0 years remaining

Wire-bonding method for semiconductor device and bonding pad to be used for that

Assignee: Toshiba Corp
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Filing: 1984-07-05
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Granted: —
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Expires: 2004-07-05
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Abstract

Abstract PURPOSE:To relax stress to be applied to the bonding pad provided on a semiconductor pellet at the time of wire-bonding and to prevent any crack from generating by a method wherein notch parts, grooves, apertures and so forth are formed in advance on the bonding pad by performing an etching. CONSTITUTION:An SiO2 layer 7 is adhered on an Si substrate 6 and a bonding pad 1 is provided thereon. When a bonding wire 8 is fushion welded on the bonding pad 1, opening parts to pierce the pad 1 through or opening parts to stop on the way are formed in advance on the pad 1. At this time, the opening parts are constituted being carved notch parts 2, notch parts 3 and grooves 4 tereon, or being provided apertures 5 and so forth thereon. In such a constitution, as the generation of cracks due to stress strain is mainly generated on the circumferential edge parts of the holes of the pad 1, roughened notch parts 2 are provided on the circumferential edge parts of the holes of the pad 1, or notch parts 3 are formed on the corner parts of the holes of the pad 1. Or, apertures 5 are specially provided on the corner parts. By such a way, the pad itself is made to hold the function of stress relaxation. As a result, the generation of the cracks can be prevented.

Inventors

  • 👤 Kazuhide Sato
  • 👤 和秀 佐藤
  • 👤 Akira Kuromaru
  • 👤 黒丸 明
  • 👤 Seiichi Hirata
  • 👤 誠一 平田
  • 👤 Koichiro Atsumi
  • 👤 幸一郎 渥美

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 05:00
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/01; H10W72/019; H10W72/015; H10W72/071; H10W72/075; H10W72/07511; H10W72/07551; H10W72/07553; H10W72/50; H10W72/531; H10W72/536; H10W72/59; H10W72/90; H10W72/931; H10W72/932; H10W72/934

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