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JPS608966A Expired / Lapsed JP ⏱️ 0.0 years remaining

Serial interface control device

Assignee: Fujitsu Ltd
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Filing: 1983-06-29
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Granted: —
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Expires: 2003-06-29
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Abstract

Abstract PURPOSE:To improve a responsiveness of a work station and a transfer efficiency by providing a direct memory access controlling circuits and two sets of serial/parallel converters and parallel/serial converters, etc. CONSTITUTION:In case a data transfer request is received from a work station A, a work station controlling circuit 9 detects this data transfer request by polling. Subsequently, the circuit 9 switches a selector 12 of a transferring circuit 5, connects a driver DV and a receiver RV of a port 13 to a P/S converter 3 and an S/P converter 4, respectively, and delivers a control of the circuit 13 to a direct memory access controlling circuit DMA10. As a result, the circuit 10 tranfers a data to the device A. At the same time, the circuit 9 executes the polling to work stations D-F. In this way, the polling to other work station can be executed, executing a data transfer to a specified work station, therefore, a responsiveness of the work station and a transfer efficiency can be improved.

Inventors

  • 👤 Yasuhiro Nioka
  • 👤 二岡 康浩
  • 👤 Masanori Sakuragi
  • 👤 桜木 正典

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 06:24
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/22; G06F13/28

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