Analog-digital converter

Abstract

Abstract PURPOSE:To attain high-speed conversion by using the combination of plural sets of monolithic IC type A/D converters having a limit to the converting speed. CONSTITUTION:An analog signal inputted from a terminal 1 is applied to the 1st sample-and-hold circuit 21, is subjected to a prescribed delay time Td sequentially by three coaxial type delay lines 11, 12 and 13 and given to the 2nd, 3rd and 4th sample-and-hold circuits 22, 23 and 24. The time Td delayed by the delay lines 11, 12 and 13 is set to T/N, where N is the number of the A/D converters. That is, the circuits 21, 22, 23 and 24 sample and hold simultaneously values A, B, C and D by using a sampling command pulse applied in the period T from a terminal 3. Further, the A/D converters 31, 32, 33 and 34 perform A/D conversion simultaneously by a pulse from a terminal 4 and a digital signal is inputted to a parallel/serial converting circuit 40.

Inventors

• 👤 Shigeaki Watanabe
• 👤 渡辺　薫明

Bibliographic Details