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JPS6021628A Expired / Lapsed JP ⏱️ 0.0 years remaining

programmable logic array

Assignee: Ricoh Co Ltd
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Filing: 1983-07-15
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Granted: —
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Expires: 2003-07-15
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Abstract

Abstract PURPOSE:To reduce power consumption by operating a sensor circuit only for a prescribed time formed on the basis of timing in a programmable logic array using a nonvolatile semiconductor element. CONSTITUTION:When an input signal is inputted to an input circuit 12, the input line to an NAND circuit 10 is selected by a decoder signal from the input circuit 12. Further, an edge sense circuit 15 detects the changeover timing of a signal from the decoder signal and a sense timing generating circuit 16 activates the sense circuit 13 for only a prescribed time based on the timing. Thus, it is during the period in which the sense circuit 13 is brought into the operating state by the sense timing generating circuit 16 when a current flows to the sense circuit 13.

Inventors

  • 👤 Mikio Kyomasu
  • 👤 幹雄 京増

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-01 16:00
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/0008; H03K19/0016; H03K19/02; H03K19/173; H03K19/177; H03K19/17704; H03K19/17708; H03K19/17712

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5998392A Cited

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