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JPS601847A Expired / Lapsed JP ⏱️ 0.0 years remaining

Hybrid integrated circuit

Assignee: Toshiba Corp
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Filing: 1983-06-20
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Granted: —
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Expires: 2003-06-20
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Abstract

Abstract PURPOSE:To obtain a hybrid integrated circuit which has a simple structure, can be mounted in a high density with bare semiconductor elements, has high reliability and can be trimmed by providing a circuit element even on the lower surface of an insulating substrate not covered with a cover material. CONSTITUTION:At least one through hole 15 is formed at an insulating substrate 1. Conductive paths 16, 17 are formed on both side surfaces of the substrate 1, and coupling means 18 for electrically connecting the paths 16, 17 is provided in the hole 15. The hole is sealed with sealing member such as epoxy resin or solder at suitable timing after the means 18 is formed. Circuit elements 4, 7 mounted on one side surface of the substrate 1 are covered with a cover material 10, which is hermetically sealed by a solder 11 on the upper surface of the substrate 1. Such a hybrid integrated circuit can be mounted with a circuit element suitably on the lower surface of the substrate 1 even after the cover 10 is hermetically sealed on the substrate 1.

Inventors

  • 👤 Saburo Nakajima
  • 👤 三郎 中島

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 03:31
CPC Classifications
H; H10; H10W; H10W90/00; H05; H05K; H05K3/00; H05K3/0094; H10W72/00; H10W72/851; H10W72/874; H10W72/884

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS49123271A Cited
JPS5426470A Cited

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