Tri-state output circuit

Abstract

Abstract PURPOSE:To eliminate useless capacitive component st an output terminal side and to attain high speed signal processing by providing a C-MOSFET using a terminal formed through the connection of drains in a tri-state output circuit as an output terminal as a control FET. CONSTITUTION:With a clock phi at H level, a P-MOS41P and an N-MOS41N are both turned on and the circuit is in the state of high impedance output. Drains of the P-MOS41P and the P-MOS42P only are added to a bus line at the output side as a capacitive component, and the addition of the capacitive component is less in comparison with a circuit inserted with a C-MOS at the power supply side and since the output side is separated by a gate of the P-MOS41P and the N-MOS41N, the effect of an input terminal 43 is not given even if any kind of signal is applied to the terminal 43.

Inventors

• 👤 Mitsunari Oya
• 👤 充也 大家

Bibliographic Details