Semiconductor device

Abstract

Abstract PURPOSE:To reduce an insulating and isolating region, by performing the insulation and isolation of a P-channel MOS transistor and an N-channel MOS transistor by an insulating and isolating layer, in which a thin gate oxide film and a poly-Si layer are laminated. CONSTITUTION:A thin oxide film 19 is provided on a layer, which is to become a substrate for MOS transistors 101 and 111. The oxide film 19 isolates the transistors 101 and 111 and also isolates an N type substrate 1, a P type region 2 and the drain ends of the transistors 101 and 111. Under a poly-Si layer 20, the drain of the P-channel MOS transistor, the substrate, the substrate of the N- channel MOS transistor and the drain ends are arranged. Since the element isolating region is formed by self-alignment, the part beneath the layer 20 is the film 19. Therefore, the area required for the element isolation can be made small, and the compact element can be implemented.

Inventors

• 👤 Nobuaki Miyagawa
• 👤 宣明 宮川
• 👤 Yasushi Nakayama
• 👤 中山　泰志
• 👤 Yoshiaki Yazawa
• 👤 矢沢　義昭
• 👤 Tatsuya Kamei
• 👤 亀井　達弥

Bibliographic Details