Memory access controlling device

Abstract

Abstract PURPOSE:To speed up sending of an access request signal by calculating the difference between address information of final element of the first data and address information of head element of the second data, and judging whether sending of access request signal of the second data is possible or not. CONSTITUTION:An adder circuit 4 adds address information of final element of data and two complements of address information of head element of data and calculates the difference from the two address information. An adder circuit 8 compares the difference of address information and the value of a register 5 by adding the difference of address information supplied through a connection 106 and output of a complement circuit 7 supplied through a connection 111, and highest rank bit of the adder circuit 8 is supplied to an inversion circuit 9 through a connection 112 as the result of comparison. The inversion circuit 9 inverts logical value of signals supplied through the connection 112, and outputs as access effective signals through a connection 113.

Inventors

• 👤 Koji Kinoshita
• 👤 木下　耕二

Bibliographic Details