Bipolar cmos hybrid integrated circuit

Abstract

Abstract PURPOSE:To reduce the chip area by providing additionally a current path forming element to a conventional circuit so as to decrease the number of the current path forming elements to discharge excees electric charge. CONSTITUTION:A diode D3 as a current path forming element is connected between nodes 1 and N2 in an output circuit comprising a CMOS logical circuit consisting of a PMOS-TrT1 and an NMOS-TrT2 and two bipolar Trs T3, T4 whose bases are connected to the source of the TrT1 and the drain of the TrT2. Thus, since the number of components is decreased by one diode, the occupied area is decreased for the share. Moreover, the floating capacitance produced at the base terminal is decreased. Or the conductor line E is included as the current path forming element. Then the occupied area of the chip is decreased further.

Inventors

• 👤 Yukio Ozawa
• 👤 幸雄 小澤

Bibliographic Details