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JPS60128633A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device and manufacture thereof

Assignee: Hitachi Ltd
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Filing: 1983-12-16
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Granted: —
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Expires: 2003-12-16
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Abstract

Abstract PURPOSE:To obtain the element isolated structure of small electrostatic capacitance in which an element wiring can be performed in the region of this thick oxide film by a method wherein an isolation groove, the inside surface of which is covered by an insulating tilm, and the relatively thick oxide film formed on the surface of a semiconductor substrate are adjoiningly formed. CONSTITUTION:An arbitrary element 35 is isolated by a groove 33, and an element 36 is isolated by thick oxide films 32a and 32b. A polycrystalline silicon oxide film 27 is formed on the element 35 isolated by the groove 33 and the region containing a boundary part 29a. Before the formation of thick oxide films 32a and 32b, a sand etching is performed on the polycrystalline oxide film 29, and a groove having the width smaller than the minimum working measurements of photolithography is formed close to the thick oxide film 32a. The width of said groove 33 is determined by the amount of side etching performed on the polycrystalline silicon oxide film 29 and the extent of extension in lateral direction of the oxide film 32.

Inventors

  • 👤 Motonori Kawaji
  • 👤 河路 幹規
  • 👤 Shigeo Kuroda
  • 👤 黒田 重雄
  • 👤 Hirotaka Nishizawa
  • 👤 裕孝 西沢
  • 👤 Toshihiko Takakura
  • 👤 俊彦 高倉

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 14:28
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01

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