Buffer memory controlling system of information processor

Abstract

Abstract PURPOSE:To improve the processing speed of the titled system by transferring the required blocks from a main storage device to a buffer memory, and registering the required blocks in the buffer memory with a requesting word at the first position and, at the same time, branching the first word to send the result to the reference requesting side, and continuously writing it in the main storage device. CONSTITUTION:A buffer memory is constituted of an address section 5, data section 4, instruction controlling section 6, registers 8-17, selection circuits 18 and 19, comparator circuit 20, etc., when it is confirmed by the circuit 20 that an instruction address from the controlling section 6 does not exist in the address section 5, a read out request of a block containing the instruction is outputted from the register 14 to a main storage device. Then the read out block is registered in the data section 4 and, at the same time, the first word is sent to the controlling section 6 for processing. When a writing reference request is outputted, the writing is continuously performed. Therefore, access is made possible even when registration of a block transferred from the main storage device to the buffer memory is not terminated.

Inventors

• 👤 Satoshi Koga
• 👤 智 古賀
• 👤 Tsutomu Tanaka
• 👤 勉 田中

Bibliographic Details