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JPS60106178A Expired / Lapsed JP ⏱️ 0.0 years remaining

Gate circuit of compound semiconductor element

Assignee: Toshiba Corp
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Filing: 1983-11-15
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Granted: —
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Expires: 2003-11-15
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Abstract

Abstract PURPOSE:To prevent an SIT or JEET incorporating semiconductor like GaAs from excessive bipolar transistor behavior and thereby to control the device with safety for the realization of high-speed operations by a method wherein a clamp circuit is provided limiting the forward bias voltage between gate and source. CONSTITUTION:A gate circuit 14 consists of a positive gate power source 15, negative gate power source 16, switch 18 switching between the power sources 15, 16 to supply power to a gate, and a clamp circuit wherein two Zener diodes 17-1, 17-2 are connected serially, back to back. The Zener diodes 17-1, 17-2 using GaAs and an SIT13 are built into one. The yield voltage is set at a value roughly similar to the gate/source built-in voltage of the SIT13. With the circuit designed as such, when the positive gate power source 15 is connected to the SIT13 for a bipolar-type operation, and even if a sufficiently high voltage is supplied by the positive gate power source 15, the voltage applied across the gate and source of the SIT13 will not exceed the built-in voltage.

Inventors

  • 👤 Akio Nakagawa
  • 👤 明夫 中川
  • 👤 Hiromichi Ohashi
  • 👤 大橋 弘道

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 19:25
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5591155A Cited

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